This invention relates to high-speed serial communication (“HSSC”) and high-speed serial interface (“HSSI”) circuitry. More particularly, this invention relates to configuring HSSI circuitry.
If the circuitry of this invention is used in a device such as a Programmable Logic Device (PLD)—e.g., to provide an interface between the PLD and other electronic devices—the PLD can be either field programmable, mask programmable, or programmable in any other way. It will be understood that terms like “PLD,” “programmable,” and the like include all of these various options. Also, terms like HSSI and HSSC are used just for convenience herein and not with the intention of limiting the invention to any rigorously defined set of possible applications or uses. Thus, the invention is applicable in any context that involves an appropriate type of communication or signaling.
HSSC is becoming increasingly popular for many different communication applications. HSSC can take many forms, including (1) many industry-standard forms such as XAUI, Infiniband, Gigabit Ethernet, Packet Over SONET or POS0 5, etc., and (2) any of a wide range of non-industry-standard or “custom” forms that particular users devise for their own uses. Such custom protocols often have at least some features similar to industry-standard protocols, but deviate from industry standards in other respects.
PLDs are typically designed to meet a wide range of different user needs. This is done so that a PLD can be manufactured in large quantities (and therefore at reduced unit cost) and sold to a large number of users for many different uses. There is increasing interest in using PLDs in applications involving HSSC. In keeping with the usual philosophy behind the design of PLDs (and in view of the many different HSSC protocols that are known and that can be developed), it is desirable for a PLD that may be used in HSSC applications to have considerable flexibility with regard to supporting different HSSC protocols.
Illustrative PLDs with certain HSSC capabilities are shown in Aung et al. U.S. patent application Ser. No. 09/805,843, filed Mar. 13, 2001, Lee et al. U.S. patent application Ser. No. 10/093,785, filed Mar. 6, 2002, and Venkata et al. U.S. patent application Ser. No. 10/195,229, filed Jul. 11, 2002. The PLDs shown in these references can support various HSSC protocols. But even greater flexibility in that regard would be desirable and is among the motivations for the present invention.
This particular invention relates to HSSI which is implemented as embedded IP (Intellectual Property) building blocks. IP building blocks (alternatively referred to as “firmware”) may be software, hardware or some combination of the two. These building blocks provide the user with pre-programmed special purpose functionality—e.g., providing the user with different pre-programmed HSSI protocols to allow a first electronic device to communicate with a second electronic device using HSSC. This functionality is typically designed to be accessed by an electronic device which may be mounted, together with any hardware that may be associated with the embedded IP, on a silicon chip. Access to these building blocks allows the user to implement the functionality associated with the building blocks without requiring the user to program, or hardwire, the functionality himself. This saves the user time and programming resources.
More particularly, this invention relates to the dynamic configuration of protocols supporting the embedded IP building blocks in a Programmable Logic Device (PLD). In conventional PLDs, the user must pre-configure the protocols supported by the embedded IP blocks before the beginning of the operation of the PLD. The configuration of the embedded IP blocks typically occurs on start-up when all the configuration instructions, data or other information for the embedded IP blocks may be serially shifted in to the PLD from an external PLD configuration device.
Furthermore, in order to configure the embedded IP, a multitude of signals and hooks (which may be general routing resources in a PLD) must be transmitted from the core PLD fabric (which may include a PLD configuration control block and PLD core building blocks) to the embedded IP building blocks. The transmission of the signals and hooks may be limited by the capacity of the interface between the core PLD fabric and the embedded IP building blocks. In fact, the requirement for a multitude of routing resources may prevent the user from being able to dynamically reconfigure the embedded IP building blocks when the PLD is operating.
Therefore, it would be desirable to provide improved communication, and an improved communication interface, between core PLD fabric and the embedded IP building blocks.